An Integrated Circuit Fault Model for Digital Systems (1976)
Defense Technical Information Center · leaf 36
tcrnt ion 'j. o * : 1*1 . (>r >co' 25 … function . 2 (x^ - £{u 100, Olul, lulu] covering aet : C ■ {p^*ul00, P^ ■ Olul] generate tests for x^ : use ?2 m Olul ?2 - llul P^ A 7 ■ 1101 (indicated by the asterisk in the map below) tests for x. - (1101 « Z, 0101 * Z)
Ketelsen,Mark Loren · Illinois univ at urbana-champaign coordinated science lab · Digital systems · Integrated circuits · Circuit interconnections · Fault tolerant computing · Modular construction · Logic circuits · Printed circuits · Soldered joints · Failure(electronics)
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