Inside Out Library

An Integrated Circuit Fault Model for Digital Systems (1976)

Defense Technical Information Center · leaf 75

An illustration from An Integrated Circuit Fault Model for Digital Systems, 1976, leaf 75
level 0 level 1 level 2 level 3 I Figure 3.9. A 4-level fenouC-free network. I I I

Ketelsen,Mark Loren · Illinois univ at urbana-champaign coordinated science lab · Digital systems · Integrated circuits · Circuit interconnections · Fault tolerant computing · Modular construction · Logic circuits · Printed circuits · Soldered joints · Failure(electronics)

Internet Archive · Defense Technical Information Center · Public domain (US government work). Free to use for anything.

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