Application of a Silicon Compiler to VLSI (Very Large Scale Integrated Circuits) Design of Digital Pipelined Multipliers (1984)
Defense Technical Information Center · leaf 58
Figure 3.9 Data Path Architecture of BultipS Chip. fabrication. Design nultipSb (source file shown in figure 3.12) tests four bits of the aultiplier on one chip, there¬ fore, only two of these chips are needed to do a coaplete ■ultiplication. Essentially this is just a doubled version of sultip8a.…
Carlson,D J · Naval postgraduate school monterey ca · Integrated circuits · Silicon · Compilers · Digital computers · INPUT · Output · Digital systems · Isolation · Theses · Storage
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