Inside Out Library

An Integrated Circuit Fault Model for Digital Systems (1976)

Defense Technical Information Center · leaf 112

An illustration from An Integrated Circuit Fault Model for Digital Systems, 1976, leaf 112
next state, output (a) Normal machine. … Direct sum machine for input faults. (b) Figure 4.4. Minimum length test sequence generation

Ketelsen,Mark Loren · Illinois univ at urbana-champaign coordinated science lab · Digital systems · Integrated circuits · Circuit interconnections · Fault tolerant computing · Modular construction · Logic circuits · Printed circuits · Soldered joints · Failure(electronics)

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