Application of a Silicon Compiler to VLSI (Very Large Scale Integrated Circuits) Design of Digital Pipelined Multipliers (1984)
Defense Technical Information Center · leaf 23
PADS … PADS Figure 2.2 T F. I a novel layout methodology results in the non-use of about 20% of the total chip area (because the blocks may have varied heights.) At present, F.I.B.S.T. supports only the H-channel metal oxide semiconductor (NMOS) technology. The F.I.B.S.T. software consists of a small…
Carlson,D J · Naval postgraduate school monterey ca · Integrated circuits · Silicon · Compilers · Digital computers · INPUT · Output · Digital systems · Isolation · Theses · Storage
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